Top 25 Articles for IEEE Transactions on Circuits and Systems I PDFs Downloaded from January - June 2009
Source of Statistics: IEEE Xplore weblogs. Note: These are not COUNTER-compliant usage statistics, which means they have not been scrubbed for automatic download tools. See worksheet for ranking of periodical titles based on overall 2009 usage.
Article Title	Volume	Issue	2008 Jan - Dec Use By Article
Design of Millimeter-Wave CMOS Radios: A Tutorial	56	1	1031
Full On-Chip CMOS Low-Dropout Voltage Regulator	54	9	1023
A frequency compensation scheme for LDO voltage regulators	51	6	810
Switched-Capacitor/Switched-Inductor Structures for Getting Transformerless Hybrid DC-DC PWM Converters	55	2	695
A DC-DC charge pump design based on voltage doublers	48	3	646
Noise Analysis for Comparator-Based Circuits	56	3	595
Phase noise in oscillators: a unifying theory and numerical methods for characterization	47	5	587
Design Procedure for Two-Stage CMOS Opamp With Flexible Noise-Power Balancing Scheme	52	8	580
Power Dissipation Bounds for High-Speed Nyquist Analog-to-Digital Converters	56	3	575
A CMOS Low Noise, Chopper Stabilized Low-Dropout Regulator With Current-Mode Feedback Error Amplifier	55	10	573
A 5-GHz CMOS Frequency Synthesizer With an Injection-Locked Frequency Divider and Differential Switched Capacitors	56	2	545
The design of low-noise bandgap references	43	4	533
A CMOS VGA With DC Offset Cancellation for Direct-Conversion Receivers	56	1	529
An Adaptive System for Optimal Solar Energy Harvesting in Wireless Sensor Network Nodes	55	6	526
VCO Design With On-Chip Calibration System	53	10	523
Analysis of multistage amplifier-frequency compensation	48	9	519
A Time-Based Bandpass ADC Using Time-Interleaved Voltage-Controlled Oscillators	55	11	490
Clocking Analysis, Implementation and Measurement Techniques for High-Speed Data Links: A Tutorial	56	1	483
PLL-Based Spread-Spectrum Clock Generator With a Ditherless Fractional Topology	56	1	473
Power Supply Noise in Analog Audio Class D Amplifiers	56	1	458
Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC	55	5	457
Digital Background-Calibration Algorithm for “Split ADC” Architecture	56	2	456
A 5-GHz-Band CMOS Receiver With Low LO Self-Mixing Front End	56	4	454
Modeling, Quantitative Analysis, and Design of Switched-Current Pipeline A/D Converters	56	4	448
Behavioral modeling of switched-capacitor sigma-delta modulators	50	3	446