Towards a Miniature Long Term Implantable Continuous Glucose Monitoring Device: Ongoing Research and Future Challenges

Power Losses in Switching DC-DC Converter ICs

AC Design and Performance of Low-Dropout Regulators (LDOs)

Design of a fractional N PLL

Low ripple Charge Pump Design

An Adaptive Body Bias based Sub-threshold Circuit Design Approach

Power Management LDO Design

High Voltage LDO Tutorial

A Silicon-On-Sapphire Instrument For Ion Channel Patch-Clamp Research

Integrated Circuit Test Engineering- An Industrial Perspective

Making the Jump from Academia to Industry:     Preparing a Chip for a Consumer Product

Analog is Everywhere: What Engineers can do in a Semiconductor Company

Retinal and Auditory Neural Prosthesis

Mixed-Signal Biomedical SOC for Implantable Cardioverter Defibrillators

A Low Power Class-AB 16W Headphone Driver Capable of Handling Wide Range of Load Capacitance

From Multi-Gb/s RAID Servers to Ultra Lpw Power iPods: AFE Ckt Design Techniques for the HDD Industry

An Overview of Analog and RF Design at Broadcom

Design Considerations for High Speed High Resolution Pipelined ADC's

Design Challenges for MIxed-Signal Nanometer CMOS Single-Chip Broadcast Receiver SOCs

Low-Power Optical Interconnect Transceivers

Circuit and System Techniques for Adaptive Equalization High-Speed Wire-Line Applications

A Fully Integrated Single Chip GSM/GPRS Phone in 130nm and its challenges

Sang Wook

An Adaptive Low Pass Filtering Technique for Spur Reduction in Integer-N Frequency Synthesizers

Marvin Onabajo

Design Methodologies for Built-In Testing of Integrated RF Transceivers with the On-Chip Loopback Technique

Dr. Jose Silva-Martinez

RF-to-DIGITAL Interfaces

Xiaohua Fan

High performance analog and RF circuits: LNAs and multistage amplifier

Towards High Performance System-On-Chip Design Automation

Room 223B ZEC

Parallel MR Imagaging: System Design And Limitations

Room 223B ZEC

A 3-Gb/s Vertical Recording Preamplifier For Hard Disk Drives

Room 223B ZEC

An On-Chip Transfer Function Characterization System for Analog Build-in Testing

Room 223B ZEC

An Analog Front End For Video Decoder Applications

Room 223B ZEC

Power Management for Wireless Applications

Room 223B ZEC

Analog Front End Design for ADSL

Room 119D ZEC

Novel Architecture of An All-digital Transmitter And A Discrete-Time Receiver For Wireless Applications

Room 119D ZEC

Design Of Frequency Synthesizers For Short Range Wireless Transceivers

Room 119D ZEC

A Combined Chopping And Average Technique for Reduced Distortion Flash A/D Converter

Room 119D ZEC

Multibit Second Order Single Amplifier Sigma-Delta ADC

Room 119D ZEC

A rail-to-rail amplifier input stage with less than ±0.5% fluctuation in g_m

Room 119D ZEC

Digital Tuning Of Continuous-Time High-Q Filters

Room 119A ZEC

High Resolution, High Speed A-D Converters Using Mash Sigma-Delta Architecture

Room 119A ZEC

Room 119A ZEC

Room 119A ZEC

Robert L. Shuler, Jr.
NASA

Multi-channel CMOS Signal Condition For Robotics Architecture and Circuit Techniques

Room 119A ZEC

CHAMELEON: A DUAL-MODE 802.11B BLUETOOTH RECEIVER DESIGN

Room 119A ZEC

Chunyu Xin
Ph.D.

Room 119A ZEC

Fikret Dülger
Ph.D.

IQ Modulator Design and Characterization in  W-CDMA Transmitters.

Room 119A ZEC

SURVEY OF CMOS AMPS FOR DRIVING SPEAKERS IN CELL PHONES

Room 119A ZEC

Paul Hurst
TI Analog Chair Candidate

Room 342 ZEC

Multi-standard, multi-band, and multi-frequency radio in CMOS

A low power time-interleaved pipeline ADC design for 802.11b /Bluetooth dual-mode receiver.

OTA Linearity enhancement technique for high frequency applications with IM3 below -65dB.

Room 119A ZEC

A 92 MHz, 80 dB peak SNR SC bandpass sigma-delta modulator based on a high GBW OTA with no Miller capacitors in 0.35um CMOS technology.

Room 119A ZEC