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Documents Accessed: Mar 2008 |
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1. |
A 1.2-V Highly Linear Balanced
Noise-Cancelling LNA in 0.13-$mu{hbox{m}}$
CMOS
Jussila, J.; Sivonen,
P.
Solid-State Circuits, IEEE Journal
of
Volume 43, Issue 3, Date: March 2008, Pages:
579-587
Digital Object Identifier
10.1109/JSSC.2007.916582
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Abstract
| Full Text: PDF
(1126 KB) | |
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2. |
A Noise Reduction and
Linearity Improvement Technique for a Differential
Cascode LNA
Xiaohua Fan; Heng Zhang;
Sanchez-Sinencio, E.
Solid-State Circuits, IEEE
Journal of
Volume 43, Issue 3, Date: March
2008, Pages: 588-599
Digital Object Identifier
10.1109/JSSC.2007.916584
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Abstract
| Full Text: PDF
(1010 KB) | |
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3. |
Fully Integrated CMOS Power
Amplifier With Efficiency Enhancement at Power
Back-Off
Gang Liu; Haldi, P.; Tsu-Jae
King Liu; Niknejad, A.M.
Solid-State Circuits,
IEEE Journal of
Volume 43, Issue 3, Date: March
2008, Pages: 600-609
Digital Object Identifier
10.1109/JSSC.2007.916585
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Abstract
| Full Text: PDF
(1499 KB) | |
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4. |
A Single-Chip CMOS Transceiver
for UHF Mobile RFID Reader
Ickjin
Kwon; Yunseong Eo; Heemun Bang; Kyudon Choi;
Sangyoon Jeon; Sungjae Jung; Donghyun Lee;
Heungbae Lee
Solid-State Circuits, IEEE Journal
of
Volume 43, Issue 3, Date: March 2008, Pages:
729-738
Digital Object Identifier
10.1109/JSSC.2007.914302
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Abstract
| Full Text: PDF
(2288 KB) | |
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5. |
40 Gb/s Transimpedance-AGC
Amplifier and CDR Circuit for Broadband Data
Receivers in 90 nm CMOS
Chih-Fan Liao;
Shen-Iuan Liu
Solid-State Circuits, IEEE
Journal of
Volume 43, Issue 3, Date: March
2008, Pages: 642-655
Digital Object Identifier
10.1109/JSSC.2007.916626
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Abstract
| Full Text: PDF
(6535 KB) | |
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6. |
Multi-Phase Injection Widens
Lock Range of Ring-Oscillator-Based Frequency
Dividers
Mirzaei, A.; Heidari, M.E.;
Bagheri, R.; Abidi, A.A.
Solid-State Circuits,
IEEE Journal of
Volume 43, Issue 3, Date: March
2008, Pages: 656-671
Digital Object Identifier
10.1109/JSSC.2007.916602
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Abstract
| Full Text: PDF
(1190 KB) | |
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7. |
A 20-Gb/s Burst-Mode Clock and
Data Recovery Circuit Using Injection-Locking
Technique
Jri Lee; Mingchung
Liu
Solid-State Circuits, IEEE Journal
of
Volume 43, Issue 3, Date: March 2008, Pages:
619-630
Digital Object Identifier
10.1109/JSSC.2007.916598
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Abstract
| Full Text: PDF
(2274 KB) | |
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8. |
A 1.8-V 22-mW 10-bit 30-MS/s
Pipelined CMOS ADC for Low-Power Subsampling
Applications
Jian Li; Xiaoyang Zeng;
Lei Xie; Jun Chen; Jianyun Zhang; Yawei
Guo
Solid-State Circuits, IEEE Journal
of
Volume 43, Issue 2, Date: Feb. 2008, Pages:
321-329
Digital Object Identifier
10.1109/JSSC.2007.914253
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Abstract
| Full Text: PDF
(1331 KB) | |
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9. |
MOS operational amplifier
design-a tutorial overview
Gray, P.R.;
Meyer, R.G.
Solid-State Circuits, IEEE Journal
of
Volume 17, Issue 6, Date: Dec 1982, Pages:
969- 982
Digital Object Identifier
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Abstract
| Full Text: PDF
(1536 KB) | |
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10. |
A Wide Power Supply Range,
Wide Tuning Range, All Static CMOS All Digital PLL
in 65 nm SOI
Tierno, J.A.; Rylyakov,
A.V.; Friedman, D.J.
Solid-State Circuits, IEEE
Journal of
Volume 43, Issue 1, Date: Jan. 2008,
Pages: 42-51
Digital Object Identifier
10.1109/JSSC.2007.910966
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Abstract
| Full Text: PDF
(1332 KB) | |
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