Country

U.S. / Germany

Degree Pursuing

Masters of Science

Advisor(s)

Dr.  Jose Silva-Martinez

Education

* B.S. in Electrical Engineering, University of Texas at Arlington, December 2003.

Areas of Interest

RF front-end circuits, built-in testing, data converters

Circuit design for testing of RF transceivers using on-chip loopback.
Built-in testing of impedance-matched low-noise amplifiers with current
injection.

ECEN 474 VLSI Circuit Design
ECEN 480 RF & Microwave Wireless Systems
ECEN 665 Integrated CMOS RF Circuits
ECEN 607 Advanced Analog Circuit Design
ECEN 610 CMOS Data Converters
ECEN 620 Broadband Communication Circuits
ECEN 661 Modulation Theory
ECEN 673 Fundamentals of Microelectronics

* M. Onabajo, F. Fernandez, J. Silva-Martinez, and E. Sánchez-Sinencio, “Strategic Test Cost Reduction with On-Chip Measurement Circuitry for RF Transceiver Front-Ends - An Overview.” Proc. of the 49th IEEE International Midwest Symposium on Circuits and Systems, August 2006.

* Research in CMOS IC design, AMSC/Texas A&M Univ. (August 2005 - present).

* Electrical Test Process/Product Engineer, 300mm Wafer Sort, Intel Corporation, Hillsboro, Oregon (July 2004 - July 2005).
* NSF Research Experiences for Undergraduates (REU) Scholar, AMIC Lab/UT-Arlington, topic: high-speed comparator design using CMOS technology (March 2003 - March 2004).