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* Texas Instruments, Dallas, TX
(June 2005-Dec 2006) Design Engineer Intern Designed the Analog Front
end circuits (HS driver, HS squelch, HS receiver, termination
calibration circuits with DAC) for High Speed USB (2.0) in TI 65nm.
*LSI Logic Corporation, Milpitas, CA
(July 2001-July 2004) Design Engineer Sr. Digital circuit & I/O
buffer design, high speed SDR/DDR memory interface design, LVDS
interfaces & high speed I/O signal integrity analysis. Successfully
designed the entire SDR/DDR memory interface circuits on Domino MPEG-2
encoder SoC.
*Intel Corporation, Santa Clara, CA
(December 2000-May 2001) Graduate Engineering Intern: Design analysis
of high speed latch/filp-flop circuits and timing techniques for
Montecito Microprocessor.
*Compaq Software Design Center (Nov
1997-Jan 1999) – Software Design Engineer. Unix & C programming for OS
Development for Digital UNIX on DEC Alpha servers. |